VLSI Architecture for Configurable and Low-Complexity Design of Hard-Decision Viterbi Decoding Algorithm / Journal of ICT Research and Applications Vol. 10 No.1 Tahun 2015

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VLSI Architecture for Configurable and Low-Complexity Design of Hard-Decision Viterbi Decoding Algorithm / Journal of ICT Research and Applications Vol. 10 No.1 Tahun 2015

Putra, Rachmad Vidya Wicaksana - Personal Name; Adiono, Trio - Personal Name;

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T-ART.10.16.2701 Tersedia

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Judul Seri: -
No. Panggil: T-ART.2016.BOX.01/T-ART.10.16.2701
Penerbit: Bandung : ITB., 2015
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Bahasa
ISBN/ISSN: 2337-5787
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VLSI Architecture for Configurable and Low-Complexity Design of Hard-Decision Viterbi Decoding Algorithm / Journal of ICT Research and Applications Vol. 10 No.1 Tahun 2015

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